Minimum shift keyed (msk) phase measurement device

ABSTRACT

Apparatus for measuring the phase of an unsynchronized but phase continuous and stabilized Minimum Shift Keyed (MSK) signal by monitoring the data channels of an MDK data communication system. This is accomplished by a phase synchronization and measurement technique that compensates for the phase shifts introduced from the MSK modulation scheme. Thus, time-varying phase changes caused by propagation effects are determinable.

United States Patent Gooding et al. 1 July 4, 1972 [54] MINIMUM SHIFTKEYED (MSK) PHASE 2,233.32? 12/1329 Gutleber ..32s/32o x AS REMENTDEVICE 0 Pueme ....l78/69.5 x ME U 3,l54,74l l0/l964 Attwood ..325/363[72] Inventors: Otis E. Gooding, Laurel; Alton E. Dixon,

'lownson, both of Md. Primary Examiner-Robert L. GriiTin AssistantExaminer-Kenneth W. Wcinstein l 73] Assignee: The Unlted States ofAmerica as reprmmed by the Sarah 0' the y Attorney Richard S. ScIascIa,J. A. Cooke and R. J. Erlckson [22] Filed: Feb. 24, 1970 ABSTRACT [21]Appl 13 397 Apparatus for measuring the phase of an unsynchronized butphase continuous and stabilized Minimum Shift Keyed (MSK) signal bymonitoring the data channels of an MDK data com- [52] U.S.Cl ..l78/88,325/320 munication system. This is accomplished by a phase [51] lnt.Cl...H04b 1/26 synchronization and measurement technique that compe [58]Field of Search ..l78/66, 67, 88, 695; 325/30, sates for the phaseshifts introduced from the MSK modula- 325/320, 363, 58, 67, M9;343/119; 324/18], 83 tion scheme. Thus, time-varying phase changescaused by propagation effects are determinable. f C'ted I Re "wees 5Claims, 6 Drawing Figures UNlTED STATES PATENTS 3,447,085 5/1969 Haas..325/320 l6 '8 LOCAL 25 22 2o 1. 2 MC/S FREQ. INFORMATION 34INFORMATION SDURCE F RATE RATE 32 GENERATOR SYNCHRONIZER l i l l "70 200|4 PHASE 24 MEASUREMENT MSK CIRCUIT PROCESSING A30 SYSTEM P'A'TENTEDJUI41912 LOCAL OSCILLATOR SHEET I BF 6 BALANCED MODULATOR MIXER FILTER (2KHZI FILTER (2 KHZ) INFORMATION RATE CLOCK SIGNAL BALANCED MODULATORBALANCED MODULATOR +4 Iss FILTER (l KHZ) FILTER (IKHZ) FILTER (I KHZIBALANCED MODULATOR Af 90 l II6 FILTER (IKHZ) Ioa I24 I42 SUMMING 1AMPLIFIER FILTER I I KHZ) DOUBLER FREQUENCY I46 I48 FILTER (SCHMITTTRIGGER (2 KHZ) TO INFO. RATE GEN.

SCHMITT 34 TRIGGER LOW - PASS SYNC. CORRECTION SIGNAL FILTER COMPARATORADVANCE ANALOG RETARD ANA LOG COMPARATOR PHASE COMARATOR DIGITAL DRIVERFIG.4

INVENTORS OTIS E. GOODING ALTON E. DIXON PATENTEDJUL 41972 SHEEI 5 OF 6.

FIG. 5

INVENTORS OTIS E. GOODING ALTON E. DIXON MINIMUM SHIFT KEYED (MSK) PHASEMEASUREMENT DEVICE BACKGROUND OF THE INVENTION This invention generallyrelates to means for measuring the phase variations of a signal in thevery low frequency (VLF) range. More specifically, this inventionprovides apparatus for determining the phase variations andperturbations caused by propagation eiTects of a Minimum Shift Keyedsignal, hereinafter referred to as an MSK signal. The primary problemassociated with MSK transmission is that in the generation ofinformation, 180 phase ambiguities are produced. The difficultiesassociated with these phase ambiguities become apparent when switchingfrom an upper sideband to a lower sideband or vice versa and then backto the original sideband. Due to the loss of synchronization there canbe a net shift of one-half cycle during the switching process. Thus, anysynchronization or lock-on to an information interval will be quitedifficult. Also, any phase measurements taken to determine anypropagational effects will reflect erroneous intelligence. Thus, in thedesign of any MSK phase measurement device a system for thesynchronization of the information rates must be utilized.

It is an object of this invention to provide an MSK phase measurementdevice that will provide synchronization of the information rates.

It is another object of this invention to provide an MSK phasemeasurement device that will consistently determine the phase changes inthe incoming VLF signal.

It is another object of this invention to provide an MSK phasemeasurement device having an output which accurately and consistentlyreflects the phase of the incoming MSK si nal.

1t is another object of this invention to eliminate 180 ambiguitiesassociated with MSK signals.

It is another object of this invention to provide a phase monitoringtechnique that realizes maximum sensitivity.

It is another object of this invention to provide for an MSK phasemeasurement device that will accurately determine the beginning of aninformation interval.

These and other objects of the instant invention and the inventionitself will become more easily understood when reference is made to thedetailed description and also to the accompanying drawings in which:

FIG. 1 is a block diagram of the over-all MSK phase measurement deviceproposed in accordance with the present invention;

FIG. 2 is a waveform diagram illustrating how 180 phase ambiguities aregenerated in a typical MSK communication system;

FIG. 3 is a block diagram illustrating the information rate generatoremployed in the measurement device of FIG. 1;

FIG. 4 is a block diagram illustrating the information rate synchronizeremployed in the measurement device of FIG. 1;

F IG. 5 is a graphical presentation illustrating the synchronousdetection that occurs in the information rate synchronizer of FIG. 4;and

FIG. 6 is a block diagram illustrating the phase measurement circuitemployed in the measurement device of FIG. 1.

DETAILED DESCRIPTION OF THE INVENTION Before any detailed discussionconcerning the operation of the subject MSK phase measurement circuitcan be effectively had, it would be appropriate to discuss thecharacteristics of the MSK signal. Basically, the MSK signal is abinary, frequency shifted, RF communication signal having outputinformation intervals that are equivalent to the intervals formed infrequency shift keyed (FSK) modulation techniques. However, the MSKsignal output ofiset frequency is directly related to the outputinformation rate unlike the FSK signal. The MSK frequency modulationtechnique results in a frequency shift that minimizes the bandwidth in agiven information rate. The MSK signal is a phase continuous, frequencydiscontinuphase ous sinusoidal wave of constant amplitude. One of twosideband frequencies is generated for the d duration of an informationinterval. For an example of a minimum-shift communication system, seeU.S. Pat. No. 2,977,417 issued on Mar. 28, 1961 to M. L. Doelz et al.The MSK signal at the transmitter can be expressed as:

a) for the upper sideband frequency, V,

Af) Krr or b) for the lower sideband frequency, V,

Af) K 11 where V transmitter frequency fl. carrier frequency Af=information rate/4 and K 0 or 1 The term (f A!) is the expression forthe upper sideband frequency and (I; f) is the expression for the lowersideband frequency. The term, K indicates that the sidebands aregenerated with 180 phase ambiguities. The expression for the MSK signalat a receiver V,) is similar to that at the transmitter. The onlydifference between the two expressions is an additional term 0(t) thatrepresents the time varying phase angle caused by propagation effects.

The instant invention is capable of but not limited to the followinginformation rates and frequency shifts (it should be noted that theterms information rate, and baud will V sin 211'! ()1.

V sin 2m ()1.

hereinafter be used interchangeably since they are synonymous):

Baud f (Hertz) The above frequencies, Af, are related to the informationrate by the expression:

i Af= (information rate/4) The primary characteristics of the MSK signalthat affect phase monitoring or phase tracking equipment are constantphase changes and random generation of phase ambiguities. Phase changesare obtained by shifting the carrier frequency 1- Af. Thus, thetransmitted frequencies (f, A1) and fl. Aj) have a phase change of 90per information interval with respect to the carrier source frequency, fFor example, with a carrier frequency of twenty kilohertz (20 KHZ) andan information interval of 10 milliseconds, a carrier signal willtraverse 200 cycles and a transmitted upper and lower frequency signalwill traverse through 200.25 cycles and 199.75 cycles respectively,during the information interval. Random generation of 180 ambiguitiesoccur in both upper and lower sideband frequencies. Ambiguity in asideband frequency depends upon the odd or even number of informationintervals for which the other sideband frequency is transmitted.

FIG. 2 shows an example of how an ambiguity occurs. Two samples of anMSK signal are shown in lines (a) and (c) of FIG. 2. The only differencebetween the two signals is the polarity of the offset frequency, Af, ininformation interval 2T through 3T. Line (b) shows the phaserelationship between the MSK signal of line (a) and a carrier frequency,1",. Line (d) shows the phase relationship A4: between the MSK signal ofline (c) and a carrier frequency, f,.. During information interval 0through 1T and interval 3T through 4T, both samples of the MSK signalare at the upper sideband frequency (f, Af). As indicated by line (e),both MSK signals are in phase during the interval 0 through 1T, but are180 out of phase during interval 3T through 4T. Therefore, it can beseen that the MSK modulation technique causes 180 phase ambiguities inthe transmitted sideband frequencies.

Referring now to FIG. 1 there is shown a block diagram for the MinimumShift Keyed phase measurement device of the present invention. Theprincipal elements of the proposed measurement device are an informationrate generator 10, formation rate synchronizer 12, phase measurementcircuit 14, local oscillator 16 (operating, for example, at 22 KHZ) andmixer 18.

The incoming RF signals, which are usually in the VLF range, arereceived by MSK Receiver 20. These incoming RF signals are applied tothe mixer 18 at input 22 and to phase measurement circuit 14 at input24. The mixer 18 also receives a 22-KHZ signal at input 25 fromoscillator 16. This 22-KI-IZ signal is combined with the incoming RFsignal to produce an IF signal at 26.

The information rate generator provides precise frequency referencesignals for the phase measurement circuit 14 and for the informationrate synchronizer 12. The information rate synchronizer l2 corrects thephase variation between the locally generated information rate signalshown at 28 and the beginning of the received transmission intervalshown at output 26 of mixer 18. A phase measurement is taken at thebeginning of the MSK information interval by the phase measurementcircuit 14 and transferred to an MSK processing system 30 at thebeginning of said processing systems processing interval.

The information rate generator 10 uses a 7.2-MHZ- reference frequencyshown at 32 that is divisible by the abovelisted information rates. Oneembodiment of the generator 10 that could produce these seveninformation rates would be a simple digital divider network. A synccorrection signal shown at 34 is applied to the generator 10 tosynchronize the phase of the information rate signal produced at 28 withthe phase of the incoming MSK signal at 24.

The synchronization process of the information rate synchronizer 12 isaccomplished by reconstructing the bit transitions of the receivedsignal and correcting the phase of the locally generated infonnationrate signal. A single sideband technique is used to establish the bittransitions. When the upper frequency is being received, the outputsignal at 34 of the information rate synchronizer 12 is a sinusoidalwave with its period equal to the information interval as is illustratedin FIG. 2. When the lower frequency is being received, the output signalat 34 of the information rate synchronizer 12 is a dc. level.Furthermore, when the upper frequency is being received, the beginningof the generated sinusoidal wave corresponds to the beginning of aninformation interval.

The phase measurement circuit 14 samples the phase of the received RFsignal at 24. At the beginning of an information interval, the phasedifierence between the received MSK signal at 24 and a locally generatedreference signal at 28 is measured in microseconds. This is accomplishedby counting l MHZ pulses that begins with the negative zero crossover ofthe received MSK signal and is terminated by a stop phase count signal.

The purpose of the information rate generator, shown in detail in FIG.3, is twofold: first, to provide a signal having a frequency of 4 timesthe carrier frequency for use in the synchronizer 12 and in the phasedetector 14; and secondly, to provide the seven information rates:50,75, I00, 150, 200, 225, and 300 bauds. More specifically, the input7.2-MHZ signal, shown at 32 in FIG. 3 is separated by a generator clock40 into two frequencies: a 1.8-Ml-IZ signal shown at 42, and a 1.44-MHZsignal shown at 44. The 1.44-MHZ signal is fed to a feedback shiftregister 46. The binary digit pattern generated by the feedback shiftregister 46 is repeated every l5 counts of the inputs 1.44-MHZ clocksignal. Upon reaching count fifteen, a frequency of 96 KHZ is detectedand transmitted, via line 48, to the phase detector 14 and, via line 50,to the information rate synchronizer 12.

The 1.8-MHZ signal shown at 42 is applied to a first decade divider 52which, like the succeeding decade dividers, is a feedback shift registerof any well-known design wherein count ten represents I80 KHZ, as shownat 54, which is detected and applied to the next decade divider 56which, in

turn, produces an 18 -KHZ signal shown at 58. The l8-KHZ signal is thenapplied to decade divider 60 to produce the desired l.8-KHZ signal shownat 62.

The 1.8-KHZ signal is fed into a divide-by-9 circuit 64, to produce abaud or information rate of 200 bits/second. The 1.8 -KHZ signal is alsofed into a divide-by-2 circuit 66, to produce a 900HZ signal at line 68.This 900 HZ signal is fed into a divide-by-4 circuit 70, thereinproducing an information rate of 225 bits/second, and also to adivide-by-3 circuit 72, therein producing a baud rate of 300bits/second. The output of the divide-by-3 circuit 72 is fed to adivide-by-Z circuit 74, therein producing an information rate of 150bits/second. The output of the divlde-by-2 circuit 74 is fed into asecond divideby-2 circuit 76, therein producing an information rate of75 bits/second. The output of the divide-by-3 circuits 72 is also fed toanother divide-by-3 network 78, therein producing an information rate of100 bits/second. The output of the divideby-3 circuit 78 is fed to adivide-by-2 circuit 80, therein producing an information rate of 50bits/second. As shown in FIG. 3, these various infonnation rate signalsare available at the information rate selector switch 82 and are appliedto the information rate synchronizer of FIG. 4 and the phase detectorcircuit of FIG. 6, for purposes to be discussed hereinafter.

Referring now to FIG. 4, there is shown the information ratesynchronizer in conjunction with the local oscillator 16 and the mixer18. The received MSK signal, f,, shown at 22 and the locally generatedoscillator signal shown at 25 are mixed by the mixer 18. The sum of thetwo input frequencies is rejected by filters 88 and 90 and the frequencyof the difference signal appearing at 92, at the output of the filter90, is (2 KHZ Af) or (2 KHZ Af) and is dependent upon which sideband isbeing received during a particular transmission interval. That is if theupper sideband (f; A!) is being transmitted, the frequency of the outputsignal at 92 will be (2 KHZ Af) and if the lower sideband (f Aj) isbeing transmitted, the frequency of the output signal at 92 will be (2KHZ Aj).

At this point, the signal equations will be used to explain the signalsideband technique used to generate the output signal of the summingamplifier 94. The designation for each equation is appropriately markedon FIG. 4.

For convenience, let the output signal (e shown at 92 be expressed bythe sinusoidal expression:

where f, Af is the signal at 22, and IF is the signal at the output ofmixer 18.

The output of the balanced modulator 96, be expressed as e,,, and isdefined as:

e,,,= (e (e,,,), where e, 2 cos (211-12,!)

The output of the balanced modulator 100, on line 102, may be expressedas 2,, and is defined as:

The signals e and e are then passed through filters 104, 106, 108 and110. The output of filter 108, on line 112 may be designated as e and isexpressed as:

on line 98, may

e =K,, cos [(21rf,, 21rfl,) t] The output of filter 110, shown at 114,may e and is expressed as:

be designated as The output of summing amplifier 94, which is shown at124 and may be designated as e,, is:

e, K, cos (271)" 2711;, 21112) I Now considering the frequency (f,,,,)of the output signal e,,, shown at 124, there is obtained:

where f, AF

and j}, 3 KHZ If the upper sideband is being received, there isobtained:

If the lower sideband is being received, there is obtained:

If the 180 out-of-phase signal, e K, cos (21rfl,t 11-), is beingreceived, the output frequency is:

l KHZ 2Af+ 1r, for the upper sideband and f,,,,, l

KHZ 17, for the lower sideband.

The 96-KI-IZ signal shown at 50 in FIG. 4 is used to generate the3-KH@-signal located at line 126 and designated as e and also the 3-KHZAlf-signal located at line 128 and designated as a These signals e and 2are injected into balanced modulators 96 and 100 respectively. Moreparticularly, the 96-KHZ signal is fed into a divide-by-8 circuit 130 toprovide a l2-KHZ signal, at 132, which is then fed into two divide-by-4circuits 134 and 136, whose outputs are both at 3 KHZ but are 90 out ofphase with each other, as noted above.

The information rate clock signal obtained from switch 82 of FIG. 3, aspreviously discussed, is used to generate the offset frequencies Ajm andAffl signals which are injected into balanced modulators 116 and 120respectively. As mentioned previously, the information rate clock signalis equal to 4 times the frequency shift Af. Accordingly, the informationrate clock signal is fed into two divide-by-4 circuits, 138 and 140,whose respective output frequencies are both Af, but are 90 out of phasewith each other.

Signal 2,, appearing on line 124 is filtered, by filter 142, and is thenfrequency doubled, in doubler 144, by a standard fullwave rectifiertechnique commonly employed in the art. Frequency doubling is requiredto compensate for the 180 phase ambiguities inherent in the receivedsignal. The output of the frequency doubler 144 is filtered by filter146. The frequency of the signal at 148 is 2 KHZ i 4 Af or 2 KHZdepending upon whether the upper or lower sideband is utilized. Thesinusoidal signal appearing at 148 is shaped into a square wave bySchmitt trigger 150 and applied to phase comparator 154 through thedigital driver circuit 152. The other input to phase comparator 154,shown at 156, is a reference 2 kHZ signal which is obtained by feedingthe 1.44-MHZ signal shown at 49 (from the generator-clock circuit 40 ofFIG. 3) successively into a variable dividing circuit 158, divide-by-IOcircuit 160, and divide by-8 circuit 162. This Z-KI-IZ reference isadvanced at 49 by advance analog comparator 166 or retarded at 47 byretard analog comparator 164 until the d.c. voltage level at the inputsof retard analog comparator 164 and advance analog comparator 166 iswithin t millivolts of the signal at 155. When this condition exists,and there are information intervals where the upper sideband is beingreceived, the outputs of low-pass filter 168 is a sinusoidal wave. Thebeginning of any cycle of this signal corresponds to the transitionbetween two transmission intervals. Schmitt trigger 170 shapes theoutputs of comparator 164 and 166 for use as a sync correction signalshown at 34, in FIGS. 1 and 4, for the information rate generator. Thus,the locally generated information rate signal is phase synchronized tothe information rate of the received MSK signal.

The process of generating the sync correction signal as previouslydescribed is illustrated by the waveforms shown in FIG. 5. The firstwaveform, shown at the top of FIG. is that signal which is applied tothe phase comparator 154, of FIG. 4, from digital driver 152. As wasdescribed hereinabove, the

phase comparator 154 converts this waveform into a sync correctionsignal as illustrated by the middle wavefonn of FIG. 5. However, theinitial sync correction signal output of the phase comparator 154 is outof phase with the received signal shown at 22 in FIG. 4. Accordingly,the outputs of comparators 164 and 166 are fed into variable dividernetwork 158 thereby correcting the phase error of the middle waveform ofFIG. 5. After this phase correction has been accomplished, the output ofphase comparator 154 is the bottom waveform of FIG. 5. It is this signalwhich is ultimately utilized as the sync correction 1 and 4.

There is shown in FIG. 6 the block diagram of the phase measurementcircuit. A phase measurement begins on the first negative crossover ofthe received MSK signal shown at 24. However, this phase measurement canonly occur after the beginning of an output information interval shownat 28 which is produced by information rate generator 10. The polarityof the crossover is referred to phase count control circuit 170.

The phase measurement is stopped by the stop phase count signal shown at172 which is produced by the quadrature reference generator 174. Thequadrature reference generator 174 also produces a signal to start thephase measurement. This signal, known as the start phase count, is shownat 176. The input frequency of the quadrature reference generator 174 issupplied, via line 48, by the information rate generator 10, through adivide-by-4 network 178. Since the input frequency 48 is 96 KHZ, thefrequency supplied to the quadrature reference generator 174 by thedivide-by-4 network 178 is 24 KHZ. Also fed into the phase count controlcircuit 170, is the information rate clock signal 28 as provided by theinformation rate generator 10. Therefore the number of phasemeasurements obtained during a one second interval is determined by theinformation rate. The phase measurement, which is in microseconds, isobtained by counting the number of l MHZ pulses that occur between thestart and stop pulses. This measurement is physically taken in phasecounter 180. The l-MI-IZ-reference signal is shown at 182. The accuracyof the phase measurement therefore is i: l microsecond. The output ofphase counter is fed into the MSK processing system 30, as previouslydescribed.

In summary therefore, there has been described a unique MSK converterthat is capable of producing phase measurements at various informationrates regardless of phase ambiguities in the input signal. This isprincipally accomplished by means of an information rate generator inconjunction with an information rate synchronizer thereby producing thedesired synchronization between the incoming MSK signal and thegenerated information rate signal thereby allowing for the precise phasemeasurement at the beginning of the information rate interval.

What is claimed is:

l. A minimum shift keyed phase measurement device comprising:

a source of incoming, phase ambiguous minimum shift keyed signals, saidsignals having various information rates;

means for generating a specified and selectable information rate, saidinformation rate generating means having an output of unsynchronizedminimum shift keyed signals;

means for synchronizing, at the beginning of an information interval,the phase of one of said output signals of said information rategenerating means with the phase of said incoming minimum shift keyedsignal by producing a synchronous correction signal representative ofthe phase difference between said output of said information rategenerating means and said incoming minimum shift keyed signals, saidsynchronizing means using this synchronous correction signal to adjustthe output of said information rate generating means so as to be inphase synchronization with said incoming minimum shift keyed signal atthe beginning of an information interval; and means for measuring thephase difference between said synchronized output of said informationrate generating means and said incoming minimum shift keyed signalthroughout the dua plurality of dividing means for reducing saidoperating ration of said information interval, wherein said phasediffrequency into a plurality of signals having predetermined ferencemeasurement means comprises: information rates. means for determiningthe beginning of an information 3. The minimum shift keyed phasemeasurement device as interval of said incoming minimum shift keyedsignal claimed in claim 2 wherein said dividing means comprises: andsaid generated information rate signal; a plurality of cascaded decadedividers for reducing said means for starting the phase measurement;operating frequency to a second and lesser frequency, means for stoppingthe phase measurement; and and a plurality of digital dividing networks,said networks means for generating a pulse train responsive to saidstart receiving Said second frequency Output of said cascaded and stopphase count whereby the phase measurement 1O f dividefs and coflveningSaid output into a p is represented by the number of pulses accumulatedf f Signalsafter the beginning of an information interval and The mlmmumShlfl keyed Phase measurement device as between said start phase countSignal and Said Stop claimed in claim 3 wherein said responding meansare analog phase count signal. comparators. I 2. The minimum shift keyedphase measurement device as The mlmmum Shlfl keyed Phase measurementdevice s claimed in claim 1 wherein said information rate generatingcla'med m claim 4 f sald means for generating 331d stop means comprises.phase count signals 1s a quadrature reference generator.

asource of operatingfrequency, and

1. A minimum shift keyed phase measurement device comprising: a sourceof incoming, phase ambiguous minimum shift keyed signals, said signalshaving various information rates; means for generating a specified andselectable information rate, said information rate generating meanshaving an output of unsynchronized minimum shift keyed signals; meansfor synchronizing, at the beginning of an information interval, thephase of one of said output signals of said information rate generatingmeans with the phase of said incoming minimum shift keyed signal byproducing a synchronous correction signal representative of the phasedifference between said output of said information rate generating meansand said incoming minimum shift keyed signals, said synchronizing meansusing this synchronous correction signal to adjust the output of saidinformatioN rate generating means so as to be in phase synchronizationwith said incoming minimum shift keyed signal at the beginning of aninformation interval; and means for measuring the phase differencebetween said synchronized output of said information rate generatingmeans and said incoming minimum shift keyed signal throughout theduration of said information interval, wherein said phase differencemeasurement means comprises: means for determining the beginning of aninformation interval of said incoming minimum shift keyed signal andsaid generated information rate signal; means for starting the phasemeasurement; means for stopping the phase measurement; and means forgenerating a pulse train responsive to said start and stop phase countwhereby the phase measurement is represented by the number of pulsesaccumulated after the beginning of an information interval and betweensaid start phase count signal and said stop phase count signal.
 2. Theminimum shift keyed phase measurement device as claimed in claim 1wherein said information rate generating means comprises: a source ofoperating frequency, and a plurality of dividing means for reducing saidoperating frequency into a plurality of signals having predeterminedinformation rates.
 3. The minimum shift keyed phase measurement deviceas claimed in claim 2 wherein said dividing means comprises: a pluralityof cascaded decade dividers for reducing said operating frequency to asecond and lesser frequency, and a plurality of digital dividingnetworks, said networks receiving said second frequency output of saidcascaded decade dividers and converting said output into a plurality ofinformation rate signals.
 4. The minimum shift keyed phase measurementdevice as claimed in claim 3 wherein said responding means are analogcomparators.
 5. The minimum shift keyed phase measurement device asclaimed in claim 4 wherein said means for generating said stop phasecount signals is a quadrature reference generator.